MT47H64M8CB-5E:B Micron Technology Inc, MT47H64M8CB-5E:B Datasheet - Page 54

• Manufacturer Part Number: MT47H64M8CB-5E:B
• Description: IC DDR2 SDRAM 512MBIT 5NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-5E:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 36:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
COMMAND
DQS, DQS#
DQS, DQS#
DQS, DQS#
ADDRESS
t DQSS (NOM)
t DQSS (MIN)
t DQSS (MAX)
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE
Bank a,
Col b
T0
WRITE-to-READ
Notes:
WL - t DQSS
WL ± t DQSS
WL + t DQSS
NOP
T1
1. DI b = data-in for column b; D
2. BL = 4, AL = 0, CL = 3; thus, WL = 2.
3. One subsequent element of data-in is applied in the programmed order following DI b.
4.
5. A10 is LOW with the WRITE command (auto precharge is disabled).
6. The number of clock cycles required to meet
7.
8. Subsequent rising DQS signals must align to the clock within
t
greater.
t
between module ranks.
WTR is referenced from the first positive CK edge after the last data-in pair.
WTR is required for any READ following a WRITE to the same device, but it is not required
DI
b
NOP
T2
DI
b
DI
b
T2n
8
NOP
T3
8
8
T3n
DON’T CARE
NOP
T4
54
OUT
n = data-out from column n.
TRANSITIONING DATA
t WTR 7
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
512Mb: x4, x8, x16 DDR2 SDRAM
WTR is either 2 or
Bank a,
READ
T6
Col n
CL = 3
CL = 3
CL = 3
T7
NOP
t
DQSS.
©2004 Micron Technology, Inc. All rights reserved.
t
WTR/
T8
t
NOP
CK, whichever is
T9
NOP
WRITEs
Dout
Dout
Dout
T9n