MT47H64M8CB-5E:B Micron Technology Inc, MT47H64M8CB-5E:B Datasheet - Page 29

• Manufacturer Part Number: MT47H64M8CB-5E:B
• Description: IC DDR2 SDRAM 512MBIT 5NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-5E:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Command Truth Tables
Table 5:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
Function
LOAD MODE
REFRESH
SELF REFRESH entry
SELF REFRESH exit
Single bank
PRECHARGE
All banks
PRECHARGE
Bank activate
WRITE
WRITE with auto
precharge
READ
READ with auto
precharge
NO OPERATION
Device DESELECT
Power-down entry
Power-down exit
Truth Table – DDR2 Commands
Notes: 1, 5, and 6 apply to all
Notes:
Previous
Cycle
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
The following tables provide a quick reference of DDR2 SDRAM available commands,
including CKE power-down modes, and bank-to-bank commands.
1. All DDR2 SDRAM commands are defined by states of CS#, RAS#, CAS#, WE#, and CKE at the
2. Bank addresses (BA) BA0–BA1 determine which bank is to be operated upon. BA during a
3. Burst reads or writes at BL = 4 cannot be terminated or interrupted. See Figure 21 on
4. The power-down mode does not perform any REFRESH operations. The duration of power-
5. The state of ODT does not affect the states described in this table. The ODT function is not
6. “X” means “H or L” (but a defined logic level).
7. SELF REFRESH exit is asynchronous.
rising edge of the clock.
LM command selects which mode register is programmed.
page 40 and Figure 35 on page 53 for other restrictions and details.
down is limited by the refresh requirements outlined in the AC parametric section.
available during self refresh. See “ODT Timing” on page 74 for details.
CKE
Current
Cycle
H
H
H
H
H
H
H
H
H
H
X
X
H
L
L
CS#
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS# CAS# WE#
X
H
H
H
H
H
H
X
X
H
X
H
L
L
L
L
L
L
29
X
H
H
H
H
H
X
X
H
X
H
L
L
L
L
L
L
L
Micron Technology, Inc., reserves the right to change products or specifications without notice.
H
H
H
H
H
H
H
H
H
X
X
X
X
L
L
L
L
L
512Mb: x4, x8, x16 DDR2 SDRAM
BA1
BA0
BA
BA
BA
BA
BA
BA
BA
X
X
X
X
X
X
X
X
Column
Address
Column
Address
Column
Address
Column
Address
A13,
A12,
A11
X
X
X
X
X
X
X
X
X
Command Truth Tables
Row Address
OP Code
©2004 Micron Technology, Inc. All rights reserved.
A10 A9–A0
H
H
H
X
X
X
X
X
X
X
L
L
L
Address
Address
Address
Address
Column
Column
Column
Column
X
X
X
X
X
X
X
X
X
Notes
2, 3
2, 3
2, 3
2, 3
2
7
2
4
4