MT47H64M8CB-5E:B Micron Technology Inc, MT47H64M8CB-5E:B Datasheet - Page 49

• Manufacturer Part Number: MT47H64M8CB-5E:B
• Description: IC DDR2 SDRAM 512MBIT 5NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-5E:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WRITEs
WRITE Command
Figure 30:
WRITE Operation
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
WRITE Command
Note:
The WRITE command is used to initiate a burst write access to an active row. The value
on the BA1–BA0 inputs selects the bank, and the address provided on inputs A0–i (where
i = A9 for x8 and x16; or A9, A11 for x4) selects the starting column location. The value on
input A10 determines whether or not auto precharge is used. If auto precharge is
selected, the row being accessed will be precharged at the end of the WRITE burst; if
auto precharge is not selected, the row will remain open for subsequent accesses.
Input data appearing on the DQ is written to the memory array subject to the DM input
logic level appearing coincident with the data. If a given DM signal is registered LOW, the
corresponding data will be written to memory; if the DM signal is registered HIGH, the
corresponding data inputs will be ignored, and a WRITE will not be executed to that
byte/column location (Figure 40 on page 58).
WRITE bursts are initiated with a WRITE command, as shown in Figure 30. DDR2
SDRAM uses WL equal to RL minus one clock cycle [WL = RL - 1CK = AL + (CL - 1CK)].
The starting column and bank addresses are provided with the WRITE command, and
auto precharge is either enabled or disabled for that access. If auto precharge is enabled,
the row being accessed is precharged at the completion of the burst. For the generic
WRITE commands used in the following illustrations, auto precharge is disabled.
BANK ADDRESS
CA = column address; BA = bank address; EN AP = enable auto precharge; and DIS AP = dis-
able auto precharge.
ADDRESS
CAS#
RAS#
WE#
A10
CKE
CK#
CS#
CK
HIGH
DON’T CARE
DIS AP
EN AP
BA
CA
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
©2004 Micron Technology, Inc. All rights reserved.
WRITEs