pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 44

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

•
Figure 3-2
Figure 3-3
direction.
Cells are assigned to queues in the Buffer Manager unit. The cell acceptance algorithm
verifies that no thresholds are exceeded that are provided for queues, schedulers, traffic
classes, as well as for the global buffer. Once accepted, a cell cannot be lost, but will be
emitted at the respective UTOPIA Interface after some time (exception: queue has been
disabled while cells are stored). Alternatively, cells can be received from the
Microprocessor Interface via the AAL5 unit. The demultiplexer forwards the cells to the
respective queue associated with a scheduler which sorts them for transmission
according to the programmed configuration. As part of the scheduling function, an
optional Peak Rate Limiter and a Leaky-Bucket shaper are provided for the shaping of
individual queues (connections).
The Queue Scheduler and the Buffer Manager are the key units for QoS provisioning in
the ABM-3G. The behavior of both units is described in subsequent chapters. The output
multiplexer recombines the cell streams of all schedulers. Emitted cells are either
forwarded to the UTOPIA Transmit Interface or to the AAL5 unit for extraction.
Data Sheet
51.84 MHz)
51.84MHz)
687 Mbit/s
687 Mbit/s
(53 byte,
(53 Byte,
64
shows a logical illustration of the ATM Buffer Manager (ABM-3G) core for one
Functional Block Diagram
Test/
Clocks
BSCAN
14
5
AAL5
SSRAM
uP IF
IF
32
42
ARC
Cell Handler downstream
Cell Handler upstream
SDRAM Interface (dn)
SDRAM Interface (up)
44
Manager
Buffer
50
50
Scheduler
Queue
Functional Description
ARC
PXF 4333 V1.1
51.84MHz)
51.84 MHz)
687 Mbit/s
2001-12-17
ABM-3G
687 Mbit/s
(53 byte,
(53 Byte,
64