pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 157

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pxf4333

Manufacturer Part Number
pxf4333
Description
Abm 3g Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
7.2.2
Register 2
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
Data Sheet
Note: The respective QID value is stored with each cell when written to the appropriate
Note: These registers are for internal use only. Do not to Write a value different from
queue in the cell storage RAM. The ABM-3G checks the stored QID value
against the supposed QID when a cell is read back from the cell storage RAM.
the Reset Value 0033
15
7
SDRAM Configuration Registers
URCFG/DRCFG
Upstream/Downstream SDRAM Configuration Registers
1
14
6
Read/Write
0033
URCFG
(Reserved)
H
Test Mode:
The LSB of the QID is inverted to test the QID checking
function. A ’BUFER4’ (Register 101: ISRU, Register 102:
ISRD) interrupt is generated whenever a cell is Read out
from the Cell Buffer RAM.
H
13
5
to Registers URCFG/DRCFG.
02
H
Reserved(15:8)
Reserved(7:0)
12
4
157
DRCFG
11
3
10
2
12
Register Description
H
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0

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