pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 280

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

7.2.21
Internal Table 10: VBR Table Transfer Registers
VBR Context Table Transfer Registers are used to access the VBR Context Table
(AVT).
Refer to
Table 7-25
32 bits.
Table 7-25
31
ERCT0 and ERCT1 are the transfer registers for one 32-bit word of the AVT table.
Access to words are controlled by mask registers ERCM0/ERCM1.
The context entry number and the corresponding word number representing the table
word which needs to be read or written must be written to the Word Address Register
(WAR). The dedicated AVT table word is read into the ERCT0/ERCT1 transfer registers
or modified by the ERCT0/ERCT1 transfer register values with a write mechanism. The
associated mask registers ERCM0 and ERCM1 allow a bit-wise Write operation (0 -
unmasked, 1 - masked). In case of Read operation, the dedicated ERCT0/ERCT1
register bit will be overwritten by the respective AVT table entry bit value. In case of Write
operation, the dedicated ERCT0/ERCT1 register bit will modify the respective AVT table
entry bit value.
The Read or Write process is controlled by the Memory Address Register (MAR). The 5
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the AVT table bit field MAR(4:0) must be set to 08
Data Sheet
15
15
ERCM1
ERCT1
Chapter 3.5.9.1
AVT Table Registers
provides an overview of the registers involved. Each AVT word consists of
AVT RAM word
Registers for AVT Table Access
0 15
0 15
for the RAM organization of this table.
ERCM0
ERCT0
0
0
0
280
15
15
WAR:
EntrySel(9:0) = (0..1023
WordSel(2:0) = (0..7
H
.
RAM Select:
Entry Select:
MAR=0A
Register Description
H
PXF 4333 V1.1
D
)
0
0
D
)
2001-12-17
ABM-3G