pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 178

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 17 UMAC/DMAC
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
UMAC(17:2)
DMAC(17:2)
Data Sheet
15
7
Upstream/Downstream Maximum Occupation Capture Registers
14
Upstream Maximum Occupation Capture Counter
Downstream Maximum Occupation Capture Counter
These bit fields represent the most significant 16 bits of the internal
18-bit wide counters reflecting the absolute maximum number of
cells stored in the respective external cell buffer since the last Read
access (peak cell filling level within measurement interval).
The CPU determines the maximum number of cells with a
granularity of 4 by reading register UMAC/DMAC and left shifting
the value by 2:
max_level(17:0):= (xMAC(17:2) << 2)
The counter value is automatically cleared to 0000
6
Read only, self-clearing on Read
0000
UMAC
Read by CPU
H
13
5
UMAC/DMAC(17:10)
26
UMAC/DMAC(9:2)
H
12
4
178
DMAC
11
3
10
2
27
Register Description
H
PXF 4333 V1.1
H
9
1
after Read.
2001-12-17
ABM-3G
8
0