pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 156

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pxf4333

Manufacturer Part Number
pxf4333
Description
Abm 3g Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
7.2
7.2.1
Register 1
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
TSTBIP
TSTQID
Data Sheet
15
7
Detailed Register Descriptions
Cell Flow Test Registers
UCFTST/DCFTST
Upstream/Downstream Cell Flow Test Registers
Test BIP-8 Supervision
0
1
Test Queue ID Supervision
(see
0
14
“Cell Queue Supervision” on Page
6
Read/Write
0000
UCFTST
Written by CPU to test internal integrity functions during
special system test scenarios
H
Normal Operation:
BIP-8 for cell protection is generated normally. No ’BIP8ER’
interrupt should occur indicating a cell storage failure.
Test Mode:
Least Significant Bit (LSB) of BIP-8 is inverted to test BIP-8
checking function. A ’BIP8ER’ (Register 101: ISRU,
Register 102: ISRD) interrupt is generated whenever a cell
is Read out of the Cell Buffer RAM.
Normal Operation:
A correct QID is generated. No ’BUFER4’ interrupt should
occur indicating an internal queue pointer failure.
13
Unused(7:2)
5
01
H
Unused(15:8)
12
4
156
DCFTST
11
3
90)
10
2
11
Register Description
H
TSTBIP TSTQID
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
8
0

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