pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 294

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 98 EXTRAMC
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
CSRDW
CSRDR
CSRUW
CSRUR
CPRW
CPRR
Data Sheet
Setting a command bit starts the Read or Write procedure from/to the selected external
RAM. The corresponding bit is automatically cleared after completion of the Read/Write
procedure.
The address to be read or to be written is provided in registers
EXTRAMA1. The 32-bit wide data is transferred via registers
EXTRAMD1.
Note: Access to external RAM is only allowed before first cell flow.
15
Unused(1:0)
7
External RAM Test Command Register
14
Cell Storage RAM downstream write
Cell Storage RAM downstream read
Cell Storage RAM upstream write
Cell Storage RAM upstream read
Cell Pointer RAM write
Cell Pointer RAM read
6
Read/Write
0000
EXTRAMA0 E0
Written and Read by CPU
H
CSRDW CSRDR CSRUW CSRUR
13
5
H
Unused(13:2)
12
4
294
11
3
10
2
EXTRAMD0
EXTRAMA0
Register Description
CPRW
PXF 4333 V1.1
9
1
and
and
2001-12-17
ABM-3G
CPRR
8
0