pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 141

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

•
Table 5-12
SSRAM
1
SDRAM
1
2
5.5
The boundary scan functionality is implemented according to IEEE 1149.1, using a 5-pin
test access port.
5.6
5.6.1
The ABM-3G supports different clock domains and clock generation configurations.
“Clocking System” on Page 52
5.6.2
The Reset signal can be asserted anytime asynchronously to the system clock. After
detecting an active reset, the ABM-3G starts internal initialization processes and resets
all registers to their reset value. Chapter
details.
Note: Internal and external RAM initialization must be initiated by software via register
Data Sheet
Type
“MODE1” on Page
Micron MT58V512V32F (flow through)
Infineon HYB39S64160BT
Infineon HYB39S256160BT
Test Interface
Clock and Reset Interface
Clocking
Reset
SSRAM and SDRAM Type Examples
312.
provides the details.
141
“Reset System” on Page 54
Configuration
512k * 32
4 banks * 1M * 16
4 banks * 4M * 16
Interface Description
PXF 4333 V1.1
provides the
2001-12-17
ABM-3G