pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 223

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

7.2.11
Internal Table 4:
The Scheduler Block Occupancy Table Transfer Registers are used to access the
internal Scheduler Block Occupancy Table (SBOC) containing 2*128 entries of 80 bit
each.
Note: The SBOC table information is typically not required by the CPU. The SBOC
Table 7-10
79
SBOC0..SBOC4 are the transfer registers for one 80-bit SBOC table entry. The
Scheduler Block number representing the table entry which needs to be read or written
must be written to the Word Address Register (WAR). The dedicated SBOC table entry
is read into the SBOC0..SBOC4 Registers or modified by the SBOC0..SBOC4 register
values with a write mechanism. The associated Mask Registers MASK0..MASK4 allow
a bit-wise Write operation (0 - unmasked, 1 - masked). In case of Read operation, the
dedicated SBOC0..SBOC4 register bit will be overwritten by the respective SBOC table
entry bit value. In case of Write operation, the dedicated SBOC0..SBOC4 register bit will
modify the respective SBOC table entry bit value.
The Read or Write process is controlled by the Memory Address Register (MAR). The 5
LSBs (= Bit 4..0) of the MAR register select the memory/table that will be accessed; to
select the SBOC table, bit field MAR(4:0) must be set to 3. Bit 5 of MAR starts the
transfer and is automatically cleared after execution.
Data Sheet
15
15
SBOC4
MASK4
Table 7-10
maintains global counters that are internally used for threshold evaluation.
For statistical purposes, reading the SBOC entries provides a snap shot of the
respective scheduler occupation situation distinguished by priorities and also the
current number of discarded low priority cells.
0 15
0 15
Scheduler Block Occupancy Table Transfer Registers
Scheduler Block Occupancy Table Transfer Registers SBOC0..SBOC4
Registers for SBOC Table Access
SBOC3
MASK3
shows an overview of the registers involved.
0 15
0 15
SBOC RAM entry
SBOC2
MASK2
0 15
0 15
223
SBOC1
MASK1
0 15
0 15
SBOC0
MASK0
0
0
0
Register Description
PXF 4333 V1.1
15
15
WAR (0..255
RAM Select:
Entry select:
MAR=03
2001-12-17
ABM-3G
H
D
0
0
)