pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 175

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 15 UBufferOccNg/DBufferOccNg
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
•
UBufferOccNg(17:2) Upstream Non-Guaranteed Buffer Occupation Counter
DBufferOccNg(17:2) Downstream Non-Guaranteed Buffer Occupation Counter
Data Sheet
15
7
Up-/Downstream Non-Guaranteed Buffer Occupation Registers
14
6
Read only
0000
UBufferOccNg
Read by CPU
These bit fields represent the most significant 16 bits of the
internal 18-bit wide counters reflecting the number of non-
guaranteed cells currently stored in the upstream/downstream
cell storage RAM.
The CPU determines the number of cells with a granularity of 4
by reading register UBufferOccNg/DBufferOccNg and left
shifting the value by 2:
fill_level(17:0):= (xBufferOccNg(17:2) << 2)
“Non-Guaranteed” cell count refers to cells, that are accepted
(stored) because of shared buffer availability although the
guaranteed minimum per queue buffer size is already occupied
by the specific queue.
The sum of all per queue guaranteed buffer sizes virtually
divides the global buffer space into a “guaranteed” part and a
“non-guaranteed” (shared) part.
Note: This counter function has been modified from ABM v1.1
H
UBufferOccNg/DBufferOccNg(17:10)
UBufferOccNg/DBufferOccNg(9:2)
13
since minimum per queue buffer reservation was
introduced in ABM-3G v1.1.
In ABM v1.1 these counters represented the number
stored “non-real-time” cells belonging to traffic classes
with the real-time indication bit ’RTind’ cleared in the
traffic class table.
5
22
12
4
175
H
11
3
DBufferOccNg 23
10
2
Register Description
PXF 4333 V1.1
9
1
H
2001-12-17
ABM-3G
8
0