pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 247

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

7.2.17
Internal Table 6: Queue Parameter Table 1 Transfer Registers
Queue Parameter Table Transfer Registers are used to access the internal Upstream
and Downstream Queue Parameter Table 1 (QPT1) containing 8192 entries each. In
both
QPT1 entry consists of 32 bits.
Note: The QPT1 table information is not used by the CPU beside during queue
Table 7-14
31
•
Table 7-15
31
UQPT1T0 and UQPT1T1 are the transfer registers for the 32-bit entry of the upstream
QPT1 table. DQPT1T0 and DQPT1T1 are the transfer registers for the 32-bit entry of the
downstream QPT1 table. Access to high and low word are both controlled by mask
registers UQPTM0/UQPTM1 and DQPTM0/DQPTM1 respectively. The Mask registers
are shared for access to both tables QPT1 and QPT2, whereas, the transfer registers
are unique for each table.
Data Sheet
15
15
15
15
QPT1 RAM entry (Downstream)
Table 7-14
UQPT1T1
DQPT1T1
UQPTM1
DQPTM1
initialization.
QPT1 RAM entry (Upstream)
Queue Parameter Table Transfer Registers
Registers for QPT1 Upstream Table Access
Registers for QPT1 Downstream Table Access
and
0 15
0 15
0 15
0 15
Table 7-15
UQPT1T0
DQPT1T0
UQPTM0
DQPTM0
provide an overview of the registers involved. Each
0
0
0
0
0
0
247
15
15
15
15
WAR (0..8191
WAR (0..8191
Entry Select:
Entry Select:
RAM Select:
RAM Select:
MAR=10
MAR=18
H
H
Register Description
D
D
)
)
0
0
0
0
PXF 4333 V1.1
2001-12-17
ABM-3G