pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 239

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pxf4333

Manufacturer Part Number
pxf4333
Description
Abm 3g Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
7.2.14
Register 56 UCDV/DCDV
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
CDVMax(8:0)
Data Sheet
15
7
Rate Shaper CDV Registers
Upstream/Downstream Rate Shaper CDV Registers
14
Maximal Cell Delay Variation (without notice)
This bit field determines a maximum CDV value for peak rate limited
queues that can be introduced without notice.
The CDVMax is measured in multiples of 16-cell cycles.
If this maximum CDV is exceeded, a CDVOV (see registers ISRU/
ISRD) interrupt is generated to indicate an unexpected CDV value.
This can occur if multiple peak rate limited queues are scheduled to
emit a cell in the same Scheduler time slot.
No cells are discarded due to this event.
6
Read/Write
0000
UCDV
Written by CPU
H
13
5
Unused(6:0)
62
H
CDVMax(7:0)
12
4
239
DCDV
11
3
10
2
82
Register Description
H
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
Max(8)
CDV
8
0

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