pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 345

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

8.4.3
The AC characteristics of the UTOPIA Interface fulfill the standard of [3] and [4]. Setup
and hold times of the 50 MHz UTOPIA Specification are valid. According to the UTOPIA
Specification, the AC characteristics are based on the timing specification for the
receiver side of a signal. The setup and the hold times are defined with regards to a
positive clock edge, see
Taking into account the actual clock frequency (up to the maximum frequency), the
corresponding (min. and max.) transmit side “clock to output” propagation delay
specifications can be derived. The timing references (tT5 to tT12) are according to the
data found in
Note: The UTOPIA Receive Interface backplane-side is optimized for operation up to
•
Figure 8-6
Figure 8-7
multiple output signals are multiplexed together).
•
Figure 8-7
Data Sheet
60 MHz UTOPIA clock frequency to achieve a speed-up factor of 1.25 in
bandwidth accepted from the backplane (respective values provided in brackets).
Signal
Signal
Clock
Clock
UTOPIA Interface
shows the tristate timing for the multi-PHY application (multiple PHY devices,
Table 8-9
Setup and Hold Time Definition (Single- and Multi-PHY)
Tristate Timing (Multi-PHY, Multiple Devices Only)
impedance from clock
signal going low
input setup to clock input hold from clock
through
Figure
90
84, 86
8-6.
Table
impedance to clock
signal going low
8-12.
88
345
85, 87
impedance from clock
signal going high
91
Electrical Characteristics
signal going high
impedance to clock
PXF 4333 V1.1
89
2001-12-17
ABM-3G