pxf4333 Infineon Technologies Corporation, pxf4333 Datasheet - Page 269

• Manufacturer Part Number: pxf4333
• Description: Abm 3g Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Register 76 USCTFT/DSCTFT
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
Init(7:0)
FracRate(7:0)
Data Sheet
Note: Recommendation for changing the UTOPIA port number or scheduler rate
during operation:
Disable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
Modify scheduler specific UTOPIA port number and rates via
"Scheduler Configuration Table Integer Transfer Registers" on Page
registers
Fractional Transfer Registers" on Page
Enable specific scheduler by read-modify-write operation to corresponding bit in
registers USCEN0/DSCEN0... USCEN7/DSCEN7.
15
7
Upstream/Downstream SCTF Transfer Registers
USCTI/DSCTI
14
Scheduler Block Initialization Value
This bit field must be written to 00
configuration/initialization and should not be written during normal
operation.
Fractional Rate
This value determines the fractional part of the Scheduler Block
output rate. Refer to
Scheduler Block Rates” on Page 106
FracRate
6
Read/Write
0000
USCTFT
Written and Read by CPU to maintain the SCTF tables
H
13
5
and
A6
H
FracRate(7:0)
12
Table 9 "Scheduler Configuration Table
4
Section 4.2.2.2 “Programming the
269
Init(7:0)
267, registers USCTFT/DSCTFT.
DSCTFT
11
3
H
at the time of Scheduler
for the calculation of
10
2
BE
Register Description
H
PXF 4333 V1.1
9
1
2001-12-17
ABM-3G
Table 8
8
0
257,