XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 90

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Pinout Descriptions
User I/Os by Bank
Table 73
distributed between the four I/O banks on the FG400
package. The AWAKE pin is counted as a Dual-Purpose
I/O.
Table 73: User I/Os Per Bank for the XC3S400A and XC3S700A in the FG400 Package
Footprint Migration Differences
The XC3S400A and XC3S700A FPGAs have identical
footprints in the FG400 package. Designs can migrate
between the XC3S400A and XC3S700A FPGAs without
further consideration.
90
Top
Right
Bottom
Left
Package
TOTAL
Edge
indicates how the 311 available user-I/O pins are
I/O Bank
0
1
2
3
Maximum I/O
311
77
79
76
79
155
I/O
50
21
35
49
www.xilinx.com
INPUT
12
12
16
46
6
All Possible I/O Pins by Type
DUAL
30
21
52
1
0
DS529-4 (v1.5) July 10, 2007
VREF
26
6
8
6
6
Product Specification
CLK
32
8
8
8
8
R