XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 85

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

FG400: 400-ball Fine-pitch Ball Grid Array
The 400-ball fine-pitch ball grid array, FG400, supports two
different Spartan-3A FPGAs, the XC3S400A and the
XC3S700A. Both devices share a common footprint for this
package as shown in
Table 72
by bank number and then by pin name. Pairs of pins that
form a differential I/O pair appear together in the table. The
table also shows the pin number for each pin and the pin
type, as defined earlier.
An electronic version of this package pinout table and
footprint diagram is available for download from the Xilinx
website at
Pinout Table
Table 72: Spartan-3A FG400 Pinout
DS529-4 (v1.5) July 10, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
lists all the FG400 package pins. They are sorted
http://www.xilinx.com/bvdocs/publications/s3a_pin.zip
IO_L01N_0
IO_L01P_0
IO_L02N_0
IO_L02P_0/VREF_0
IO_L03N_0
IO_L03P_0
IO_L04N_0
IO_L04P_0/VREF_0
IO_L05N_0
IO_L05P_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L08N_0
IO_L08P_0
IO_L09N_0
IO_L09P_0
IO_L10N_0/VREF_0
IO_L10P_0
IO_L11N_0
IO_L11P_0
IO_L12N_0
IO_L12P_0
IO_L13N_0
IO_L13P_0
IO_L14N_0
IO_L14P_0
R
Pin Name
Table 72
and
Figure
FG400
Ball
C17
D17
D16
C16
C15
D15
C14
C13
D14
C12
D12
C11
A18
B18
E15
A17
B17
A16
A14
A15
B15
F13
E13
B13
F12
A12
B12
B11
21.
VREF
VREF
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
.
Table 72: Spartan-3A FG400 Pinout (Continued)
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IO_L15N_0/GCLK5
IO_L15P_0/GCLK4
IO_L16N_0/GCLK7
IO_L16P_0/GCLK6
IO_L17N_0/GCLK9
IO_L17P_0/GCLK8
IO_L18N_0/GCLK11
IO_L18P_0/GCLK10
IO_L19N_0
IO_L19P_0
IO_L20N_0
IO_L20P_0
IO_L21N_0
IO_L21P_0
IO_L22N_0/VREF_0
IO_L22P_0
IO_L23N_0
IO_L23P_0
IO_L24N_0
IO_L24P_0
IO_L25N_0
IO_L25P_0
IO_L26N_0
IO_L26P_0
IO_L27N_0
IO_L27P_0
IO_L28N_0
IO_L28P_0
IO_L29N_0
IO_L29P_0
IO_L30N_0
IO_L30P_0
IO_L31N_0
IO_L31P_0
IO_L32N_0/PUDC_B
IO_L32P_0/VREF_0
IP_0
IP_0
IP_0
IP_0
IP_0
Pin Name
Pinout Descriptions
FG400
Ball
E11
D11
C10
A10
E10
D10
E14
F11
F14
C9
B9
C8
B8
D8
C7
E9
E8
A7
B7
C6
A6
B5
A5
E7
D6
C5
C4
A4
B3
A3
E6
B2
A2
G8
G9
A8
A9
F9
F8
F7
F6
INPUT
INPUT
INPUT
INPUT
INPUT
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
VREF
DUAL
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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