XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 29

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XC3S50A

Manufacturer Part Number
XC3S50A
Description
Spartan-3a Fpga Family Data Sheet
Manufacturer
Xilinx Corp.
Datasheet

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Three-State Output Propagation Times
Table 24: Timing for the IOB Three-State Path
DS529-3 (v1.5) July 10, 2007
Product Specification
Notes:
1.
2.
Synchronous Output Enable/Disable Times
T
T
Asynchronous Output Enable/Disable Times
T
Set/Reset Times
T
T
IOCKHZ
IOCKON
GTS
IOSRHZ
IOSRON
Symbol
The numbers in this table are tested using the methodology presented in
Table 8
This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the
data Output. When this is true, add the appropriate Output adjustment from
(2)
(2)
and
R
Table
Time from the active transition at the OTCLK
input of the Three-state Flip-Flop (TFF) to when
the Output pin enters the high-impedance state
Time from the active transition at TFF’s OTCLK
input to when the Output pin drives valid data
Time from asserting the Global Three State
(GTS) input on the STARTUP_SPARTAN3A
primitive to when the Output pin enters the
high-impedance state
Time from asserting TFF’s SR input to when
the Output pin enters a high-impedance state
Time from asserting TFF’s SR input at TFF to
when the Output pin drives valid data
11.
Description
www.xilinx.com
LVCMOS25, 12 mA
output drive, Fast slew
rate
LVCMOS25, 12 mA
output drive, Fast slew
rate
LVCMOS25, 12 mA
output drive, Fast slew
rate
Conditions
Table 26
Table
25.
and are based on the operating conditions set forth in
Device
DC and Switching Characteristics
All
All
All
All
All
Speed Grade
Max
1.13
3.08
9.47
1.61
3.57
-5
10.36
Max
1.39
3.35
1.86
3.82
-4
Units
ns
ns
ns
ns
ns
29

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