XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 102

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Pinout Descriptions
102
FG484 Footprint
Left Half of FG484
Package (top view)
194-
195
61-
33-
62
52
34
32
53
24
15
10
◆
3
4
3
I/O: Unrestricted,
general-purpose user I/O
INPUT: Unrestricted,
general-purpose input pin
DUAL: Configuration,
AWAKE pins, then possible
user I/O
VREF: User I/O or input
voltage reference for bank
CLK: User I/O, input, or
clock buffer input
CONFIG: Dedicated
configuration pins,
SUSPEND pin
JTAG: Dedicated JTAG
port pins
GND: Ground
VCCO: Output voltage
supply for bank
VCCINT: Internal core
supply voltage (+1.2V)
VCCAUX: Auxiliary supply
voltage
N.C.: Not connected
(XC3S700A only)
Figure 22: FG484 Package Footprint (top view)
M
W
A
B
C
D
E
F
G
H
K
L
N
P
R
T
U
V
Y
A
A
A
B
J
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VREF_3
LHCLK2
LHCLK3
LHCLK4
VREF_3
VREF_3
L02P_3
L01P_3
L06P_3
L06N_3
L12N_3
L13N_3
L16N_3
L17N_3
L22P_3
L22N_3
L24P_3
L26P_3
L28P_3
L32P_3
L36P_3
L37P_3
L38P_3
L42P_3
L44P_3
L45P_3
IRDY2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
PUDC_B
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VREF_0
LHCLK5
L36N_0
L36P_0
L02N_3
L01N_3
L12P_3
L16P_3
L20N_3
L24N_3
L28N_3
L32N_3
L37N_3
L42N_3
L44N_3
L45N_3
L03P_2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
LHCLK1
LHCLK6
L33P_0
L33N_0
L03P_3
L07N_3
L08P_3
L13P_3
L14N_3
L17P_3
L20P_3
L21N_3
L25P_3
L26N_3
L29P_3
L33P_3
L36N_3
L41P_3
L38N_3
L43N_3
L03N_2
L04P_2
TRDY2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
VCCAUX
LHCLK7
L31P_0
L31N_0
L03N_3
L07P_3
L08N_3
L14P_3
L18N_3
L25N_3
L30N_3
L33N_3
L34N_3
L41N_3
L43P_3
L02P_2
L02N_2
CSO_B
L04N_2
L06P_2
GND
GND
TMS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M2
4
VCCAUX
VCCAUX
VCCO_0
VCCO_2
LHCLK0
INPUT
L28N_0
L32P_0
L32N_0
L05N_3
L09P_3
L10N_3
L18P_3
L21P_3
L30P_3
L31N_3
L29N_3
L34P_3
L40P_3
L40N_3
L01N_2
L05N_2
L06N_2
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M0
5
VCCO_3
VCCO_3
INPUT
INPUT
INPUT
VREF_3
INPUT
VREF_3
L26N_0
L28P_0
L29P_0
L29N_0
L35N_0
L05P_3
L09N_3
L10P_3
L23N_3
L31P_3
L46N_3
L01P_2
L05P_2
L07N_2
L08P_2
L08N_2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1
Bank 0
6
Bank 2
INPUT
VREF_3
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VREF_2
INPUT
INPUT
L26P_0
L27N_0
L27P_0
L34P_0
L35P_0
INPUT
L04N_3
L11P_3
L15P_3
L19P_3
L23P_3
L35P_3
L39P_3
L46P_3
INPUT
L07P_2
L10P_2
L10N_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
◆
7
DS529-4 (v1.5) July 10, 2007
INPUT
VREF_0
INPUT
VREF_3
INPUT
VREF_3
INPUT
INPUT
INPUT
INPUT
VREF_2
INPUT
VREF_2
L22N_0
L25P_0
L25N_0
L30N_0
L34N_0
INPUT
L04P_3
INPUT
L11N_3
INPUT
L15N_3
L19N_3
L27P_3
L35N_3
L39N_3
INPUT
INPUT
L11P_2
L11N_2
L12P_2
L12N_2
VS1
VS0
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
◆
8
Product Specification
VCCINT
VCCINT
RDWR_B
VCCO_0
VCCO_2
VCCO_2
VREF_0
INPUT
VREF_0
INPUT
INPUT
INPUT
INPUT
L22P_0
L24P_0
L24N_0
L30P_0
L27N_3
L09P_2
L09N_2
L14P_2
L14N_2
GND
GND
GND
GND
VS2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
D6
9
VCCINT
VCCINT
VCCINT
VCCO_0
VREF_2
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
L21P_0
L21N_0
L23P_0
L23N_0
L13P_2
L13N_2
L15P_2
L15N_2
GND
GND
GND
GND
DS529-4 01 101106
I/O
I/O
I/O
I/O
10
I/O
I/O
I/O
I/O
VCCINT
VCCINT
VCCAUX
VCCAUX
VCCAUX
GCLK10
GCLK11
VREF_2
GCLK12
GCLK13
INPUT
INPUT
INPUT
L18N_0
GCLK7
L19P_0
GCLK8
L19N_0
GCLK9
L20P_0
L20N_0
L17P_2
L17N_2
L16P_2
L16N_2
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
11
I/O
I/O
I/O
D5
D4
R