XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 58

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

DC and Switching Characteristics
Table 52: Configuration Timing Requirements for Attached SPI Serial Flash
58
Notes:
1.
2.
T
T
T
T
f
C
CCS
DSU
DH
V
Symbol
or f
These requirements are for successful FPGA configuration in SPI mode, where the FPGA generates the CCLK signal. The
post-configuration timing can be different to support the specific needs of the application loaded into the FPGA.
Subtract additional printed circuit board routing delay as required by the application.
R
SPI serial Flash PROM chip-select time
SPI serial Flash PROM data input setup time
SPI serial Flash PROM data input hold time
SPI serial Flash PROM data clock-to-output time
Maximum SPI serial Flash PROM clock frequency (also depends on
specific read command used)
Description
www.xilinx.com
T
T
T
CCS
DSU
V
f
T
≤
C
DH
T
≥
≤
≤
Requirement
MCCLn
T
T
-------------------------------- -
T
≤
MCCL1
MCCL1
CCLKn min
T
MCCH1
DS529-3 (v1.5) July 10, 2007
1
–
(
T
–
–
Product Specification
DCC
T
T
CCO
CCO
)
Units
MHz
ns
ns
ns
ns
R