XC3S50A Xilinx Corp., XC3S50A Datasheet - Page 64

• Manufacturer Part Number: XC3S50A
• Description: Spartan-3a Fpga Family Data Sheet
• Manufacturer: Xilinx Corp.

Pinout Descriptions
Table 56: Types of Pins on Spartan-3A FPGAs (Continued)
Package Pins by Type
Each package has three separate voltage supply
inputs—VCCINT, VCCAUX, and VCCO—and a common
ground return, GND. The numbers of pins dedicated to
these functions vary by package, as shown in
Table 57: Power and Ground Supply Pins by Package
Table 58: Maximum User I/O by Package
64
Notes:
1.
TQ144
FT256
FG320
FG400
FG484
FG676
XC3S50A
XC3S50A
XC3S200A
XC3S400A
XC3S200A
XC3S400A
Type / Color
Package
VCCAUX
VCCINT
Device
# = I/O bank number, an integer between 0 and 3.
VCCO
Code
JTAG
GND
N.C.
VCCINT
Dedicated JTAG pin - 4 per device. Not available as a user-I/O pin. Every package has
four dedicated JTAG pins. These pins are powered by VCCAUX.
Dedicated ground pin. The number of GND pins depends on the package used. All must
be connected.
Dedicated auxiliary power supply pin. The number of VCCAUX pins depends on the
package used. All must be connected.
Dedicated internal core logic power supply pin. The number of VCCINT pins depends on
the package used. All must be connected to +1.2V.
Along with all the other VCCO pins in the same bank, this pin supplies power to the output
buffers within the I/O bank and sets the input threshold voltage for some I/O standards. All
must be connected.
This package pin is not connected in this specific device/package combination but may be
connected in larger devices in the same package.
Package
15
23
TQ144
FG320
4
6
6
9
FT256
VCCAUX
Input-Only
Maximum
User I/Os
10
14
4
4
8
8
and
108
144
195
195
248
251
VCCO
Maximum
16
16
22
24
36
8
Input-
Only
Table
32
35
35
56
59
7
Description
57.
GND
13
28
32
43
53
77
www.xilinx.com
Differential
Maximum
Pairs
112
112
50
64
90
90
A majority of package pins are user-defined I/O or input
pins. However, the numbers and characteristics of these I/O
depend on the device type and the package in which it is
available, as shown in
maximum number of single-ended I/O pins available,
assuming that all I/O-, INPUT-, DUAL-, VREF-, and
CLK-type pins are used as general-purpose I/O. AWAKE is
counted here as a Dual-Purpose I/O pin. Likewise, the table
shows the maximum number of differential pin-pairs
available on the package. Finally, the table shows how the
total maximum user-I/Os are distributed by pin type,
including the number of unconnected—N.C.—pins on the
device.
Not all I/O standards are supported on all I/O banks. The left
and right banks (I/O banks 1 and 3) support higher output
drive current than the top and bottom banks (I/O banks 0
and 2). Similarly, true differential output standards, such as
LVDS, RSDS, PPDS, miniLVDS, and TMDS, are only
supported in the top or bottom banks (I/O banks 0 and 2).
Inputs are unrestricted. For more details, see the chapter
"Using I/O Resources" in UG331.
101
101
I/O
42
53
69
69
INPUT
20
21
21
40
42
2
All Possible I/Os by Type
Table
DUAL
26
26
52
52
52
52
58. The table shows the
DS529-4 (v1.5) July 10, 2007
TDI, TMS, TCK, TDO
GND
VCCAUX
VCCINT
VCCO_#
N.C.
VREF
15
21
21
23
24
8
Pin Name(s) in Type
Product Specification
CLK
30
30
32
32
32
32
N.C.
51
0
0
0
3
0
R