M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 98

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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9.1.2 Hardware Interrupts
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Hardware interrupts are classified into two types — special interrupts and peripheral function interrupts.
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9.1.2.1 Special Interrupts
9.1.2.2 Peripheral Function Interrupts
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Special interrupts are non-maskable interrupts.
9.1.2.1.1 NMI Interrupt
9.1.2.1.2 DBC Interrupt
9.1.2.1.3 Watchdog Timer Interrupt
9.1.2.1.4 Oscillation Stop and Re-oscillation Detection Interrupt
9.1.2.1.5 Low Voltage Detection Interrupt
9.1.2.1.6 Single-step Interrupt
9.1.2.1.7 Address Match Interrupt
Peripheral function interrupts are maskable interrupts and generated by the MCU's internal functions.
The interrupt sources for peripheral function interrupts are listed in Table 9.2 Relocatable Vector
Tables. For details about the peripheral functions, refer to the description of each peripheral function
in this manual.
0
G
An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details
about the NMI interrupt, refer to the section "NMI interrupt".
This interrupt is exclusively for debugger, do not use in any other circumstances.
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize
the watchdog timer. For details about the watchdog timer, refer to the section "watchdog timer".
Generated by the oscillation stop and re-oscillation detection function. For details about the oscilla-
tion stop and re-oscillation detection function, refer to the section "clock generating circuit".
Generated by the voltage detection circuit. For details about the voltage detection circuit, refer to the
section "voltage detection circuit".
Do not normally use this interrupt because it is provided exclusively for use by development tools.
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMAD0 or RMAD1 register, if the corresponding enable bit (AIER0 or AIER1 bit in
the AIER register) is set to 1. For details about the address match interrupt, refer to the section
“address match interrupt”.
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