M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 68

• Manufacturer Part Number: M30290FAHP#U5A
• Description: IC M16C/29 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/29r

Specifications of M30290FAHP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 27x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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1
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Figure 5.8 Low Voltage Detection Interrupt Generation Block
Figure 5.9 Low voltage Detection Interrupt Generation Circuit Operation Example
6
0
1
C
9
1 .
B
2 /
0
2
9
1
Low voltage detection circuit
V
Vref
Watchdog timer block
M
CC
0
G
NOTES:
1
VCC
VC13 bit
Output of the digital filter
D42 bit
L o w v o l t a g e d e t e c t i o n
i n t e r r u p t s i g n a l
r a
0 -
o r
VC27
3 .
1. D40 bit in the D4INT register is set to 1 (low voltage detection interrupt enabled).
2. Output of the digital filter shown in Figure 5.8.
+
-
(Rejection wide:200 ns)
1
u
, 0
1
p
2
2
Noise
rejection
0
0
7
WAIT instruction (wait mode)
“H” when VC27 bit = 0
(disabled)
Watchdog timer
underflow signal
page 42
(2)
Low voltage detection
signal
D4INT clock(the
clock with which it
operates also in
wait mode)
VC13
CM10
CM02
f o
4
5
8
Low voltage detection interrupt generation circuit
s a m p l i n g
1/8
This bit is set to 0 (not detected) by writing a 0 by program.
D43
1/2
1/2
Noise rejection
circuit
1/2
sampling
00
01
10
11
2
2
2
2
DF1, DF0
D41
Digital
filter
N o l o w v o l t a g e d e t e c t i o n i n t e r r u p t s i g n a l s a r e
g e n e r a t e d w h e n t h e D 4 2 b i t i s 1 .
D42 bit is set to 0 (not detected) by
writing a 0 in a program. VC27 bit is
set to 0 (low voltage detection circuit
disabled), the D42 bit is set to 0.
D42
S e t t o 0 b y
p r o g r a m
d e t e c t e d )
s a m p l i n g
D40
( n o t
Watchdog
timer interrupt
signal
Oscillation stop,
re-oscillation
detection
interrupt signal
Low voltage
detection
interrupt signal
S e t t o 0 b y a
p r o g r a m
d e t e c t e d )
s a m p l i n g
( n o t
Non-maskable
interrupt signal