M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 486

• Manufacturer Part Number: M30290FAHP#U5A
• Description: IC M16C/29 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/29r

Specifications of M30290FAHP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 27x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
Date
REVISION HISTORY
276 to 300 Chapter “17. CAN Module” is revised.
360 to 372 Section “20.3 V version” is deleted.
230, 231 Figure 15.1.7.2 and 15.1.7.3 are partly revised.
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392
“Figure 12.3.9 PFCR register and TPRC register” is deleted.
Figure 12.3.1.2.1 and the section 12.3.1.2.4 are partly revised.
Section “Three-phase/Port Output Switch Function” and “Figure 12.3.2.1 PFCR
register and TPRC register” are added.
“UART 2 special mode register 2” in Figure 14.1.8 is partly revised.
“UART 2 special mode register 3” in Figure 14.1.9 is partly revised.
Note 1 in Table 15.1.1.1 is deleted.
Figure 15.4 is partly revised.
Figure 15.5 is partly revised.
Section “15.1.3 Single Sweep mode” is partly revised.
Section “15.1.4 Repeat Sweep mode 0” is partly revised.
Section “15.1.5 Repeat Sweep mode 1” is partly revised.
Section “15.1.6 Simultaneous Sample Sweep Mode”, Table 15.1.6.1, and Figure
15.1.6.1 are partly revised.
Section “15.1.7 Delayed Trigger Mode 0” and Table 15.1.7.1 are partly revised.
Figure 15.1.7.1 is partly revised.
Figure 15.1.7.3 is deleted.
Section “15.1.8 Delayed Trigger Mode 1” and Table 15.1.8.1 are partly revised.
Figure 15.5.1 is partly revised.
Chapter “18. CRC Calculation Circuit” is partly revised.
Figure 18.3 is partly revised.
Chapter “19. Programmable I/O ports” is partly revised.
Section “19.5 Pin Assignment Control Register” is partly revised.
“Pull-up control register” in Figure 19.3.1 is partly revised.
Table 20.4 and 20.5 and Note 6 and 10 are partly revised.
Note 3 in Table 20.6 is added.
Table 20.43 and 20.44 and Note 10 are partly revised.
Note 3 in Table 20.45 is added.
Table 21.1 is partly revised.
Section “•FMR01 Bit”, “•FMR02 Bit” and “•FMSTP Bit” are partly revised.
Section “•FMR16 Bit”, “• FMR17 Bit” and “FMR41 Bit” are partly revised.
Figure 21.5.1 is revised.
Figure 21.5.1.3 is partly revised.
Section “21.4.2 EW1 Mode” is partly revised.
Section “21.6.4 How to Access” is partly revised.
Section “21.7.5. Block Erase” is partly revised.
C-2
Description
M16C/29 Hardware Manual
Summary