M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 264

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 15.8 Simultaneous Sample Sweep Mode Specifications
NOTE:
Figure 15.16 Operation Example in Simultaneous Sample Sweep Mode
0
Function
A/D Conversion Start Condition
A/D Conversion Stop Condition
Interrupt Generation Timing A/D conversion completed
Analog Input Pin
Readout of A/D conversion result Readout one of registers AN0 to AN7 that corresponds to the selected pin
1
9
15.1.6 Simultaneous Sample Sweep Mode
1 .
B
1. AN0
In simultaneous sample sweep mode, analog voltages applied to the selected pins are converted one-by-
one to a digital code. The input voltages of AN0 and AN1 are sampled simultaneously using two circuits
of sample and hold circuit. Table 15.8 shows the simultaneous sample sweep mode specifications.
Figure 15.16 shows the operation example in simultaneous sample sweep mode. Figure 15.17 shows
registers ADCON0 to ADCON2 and Figure 15.18 shows ADTRGCON registers in simultaneous sample
sweep mode. Table 15.9 shows the trigger select bit setting in simultaneous sample sweep mode. In
simultaneous sample sweep mode, Timer B0 underflow can be selected as a trigger by combining soft-
ware trigger, AD
underflow or A/D trigger mode of Timer B.
0
2
1
pins need to belong to the same group.
M
0
1
r a
0 -
0
3 .
Item
1
to AN0
AN
AN
AN
AN
AN
AN
AN
AN
, 0
1
•Example when selecting AN
2
0
1
2
3
4
5
6
7
2
0
0
A/D conversion started
___________
7
7
, AN 2
TRG
page 238
0
to AN2
trigger, Timer B2 underflow, Timer B2 interrupt generation frequency setting counter
Bits SCAN1 and SCAN0 in the ADCON1 register and bits ADGSEL1 and
ADGSEL0 in the ADCON2 register select pins. Analog voltage applied
to the selected pins is converted one-by-one to a digital code. At this time,
the input voltage of AN
When the TRG bit in the ADCON0 register is 0 (software trigger)
When the TRG bit in the ADCON0 register is 1 (hardware trigger)
The trigger is selected by bits TRG1 and HPTRG0 (See Table 15.9)
A/D conversion completed (If selecting software trigger, the ADST bit is
automatically set to 0 ).
Set the ADST bit to 0 (A/D conversion halted)
Select from AN
or AN
Set the ADST bit in the ADCON0 register to 1 (A/D conversion started)
7
The AD
bit to 1 (A/D conversion started)
Timer B0, B2 or Timer B2 interrupt generation frequency setting counter
underflow after setting the ADST bit to 1 (A/D conversion started)
f o
, and AN3
4
5
0
8
0
to AN
to AN
TRG
0
to AN3
7
pin input changes state from “H” to “L” after setting the ADST
3
to A/D pins for sweep (SCAN1 to SCAN0 = 01
(8 pins)
0
to AN
2
can be used in the same way as AN
1
0
(1)
(2 pins), AN
and AN
A/D interrupt request generated
Specification
1
are sampled simultaneously.
0
to AN
3
(4 pins), AN
A/D pin input voltage
sampling
A/D pin conversion
0
to AN
2
)
0
to AN
7
. However, all input
5
(6 pins),

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