M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 95

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
e
E
8. Protection
1
. v
J
Figure 8.1 PRCR Register
6
0
1
9
C
In the event that a program runs out of control, this function protects the important registers so that they will
not be rewritten easily. Figure 8.1 shows the PRCR register. The following lists the registers protected by
the PRCR register.
The PRC2 bit is set to 0 (write enabled) when data is written to the SFR area after setting the PRC2 bit to 1
(write enable). Set registers PD9, PACR, S4C and NDDR immediately after setting the PRC2 bit in the
PRCR register to 1 (write enable). Do not generate an interrupt or a DMA transfer between the instruction
to set the PRC2 bit to 1 and the following instruction. Bits PRC3, PRC1, and PRC0 are not set to 0 even if
data is written to the SFR area. Set bits PRC3, PRC1, and PRC0 to 0 by program.
1 .
B
2 /
0
2
• Registers protected by the PRC0 bit: CM0, CM1, CM2, PLC0, ROCR, PCLKR, and CCLKR
• Registers protected by the PRC1 bit: PM0, PM1, PM2, TB2SC, INVC0, and INVC1
• Registers protected by the PRC2 bit: PD9 , PACR, S4C, and NDDR
• Registers protected by the PRC3 bit: VCR2 and D4INT
9
1
M
0
Protect Register
G
1
r a
b7
NOTE:
0 -
o r
3 .
1
b6
1. The PRC2 bit is set to 0 when writing into the SFR area after the PRC2 bit is set to 1. Bits
u
, 0
1
p
2
PRC0, PRC1, and PRC3 are not automatically set to 0. Set them to 0 by program.
0
b5
2
0
0
0
b4
7
b3
b2
page 69
b1
b0
Bit Symbol
f o
(b5-b4)
(b7-b6)
PRC0
PRC1
PRC3
PRC2
Symbol
PRCR
4
5
8
Nothing is assigned. If necessary, set to 0.
When read, its content is undefined
Protect bit 0
Protect bit 1
Protect bit 2
Protect bit 3
Reserved bit
Bit Name
Address
000A
16
After Reset
XX000000
Enable write to register CM0, CM1,
CM2, ROCR, PLC0, PCLKR, and
CCLKR
0: Write protected
1: Write enabled
Enable write to registers PM0, PM1,
PM2, TB2SC, INVC0, and INVC1
0: Write protected
1: Write enabled
Enable write to registers PD9,
PACR, S4C, and NDDR
0: Write protected
1: Write enabled
Enable write to registers VCR2 and
D4INT
0: Write protected
1: Write enabled
Set to 0
2
Function
(1)
RW
RW
RW
RW
RW
RW

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