M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 358

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
R
M
e
E
20.2 Memory Map
1
. v
J
Figure 20.1 Flash Memory Block Diagram (ROM capacity 64 Kbytes)
6
0
C
The flash memory contains the user ROM area and the boot ROM area (reserved area). Figures 20.1 to
20.3 show a block diagram of the flash memory. The user ROM area has space to store the MCU operation
program in single-chip mode and two 2-Kbyte spaces: the block A and B.
The user ROM area is divided into several blocks. The user ROM area can be rewritten in CPU rewrite,
standard serial I/O, parallel I/O, or CAN I/O mode.
However, to rewrite program in block 0 and 1 in CPU rewrite mode, set the FMR02 bit in the FMR0 register
to 1 (block 0, 1 rewrite enabled) and the FMR16 bit in the FMR1 register to 1 (blocks 0 to 5 rewrite enabled).
Also, to rewrite program in blocks 2 to 5 in CPU rewrite mode, set the FMR16 bit in the FMR1 register to 1
(blocks 0 to 5 rewrite enabled). When the PM10 bit in the PM1 register is set to 1 (data space access
enabled), blocks A and B can be available for use.
1
9
1 .
B
2 /
0
2
9
1
M
0
G
1
r a
0 -
o r
3 .
1
u
0F0000
0F7FFF
0F8000
0FBFFF
0FC000
0FDFFF
0FE000
0FFFFF
00F000
00F7FF
00F800
00FFFF
, 0
1
p
2
2
0
0
16
16
16
16
16
16
16
16
16
16
16
16
7
page 332
Block 2 : 16K bytes
Block 3 : 32K bytes
Block 1 : 8K bytes
Block 0 : 8K bytes
Block A :2K bytes
Block B :2K bytes
Block 2 : 16K bytes
User ROM area
(Program space)
(Data space)
f o
4
5
8
(2)
(2)
(3)
(3)
(5)
(5)
NOTES:
1. To specify a block, use the maximum even address in the block.
2. Blocks A and B are enabled to use when the PM10 bit in the PM1
3. Blocks 0 and 1 are enabled for programs and erases when the
4. The boot ROM area is reserved. Do not access.
5. Blocks 2 and 3 are enabled for programs and erases when the
register is set to 1.
FMR02 bit in the FMR0 register is set to 1 and the FMR16 bit in
the FMR1 register is set to 1. (CPU rewrite mode only)
FMR16 bit in the FMR1 register is set to 1. (CPU rewrite mode
only)
0FFFFF
0FF000
16
16
Boot ROM area
4K bytes
(4)

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