M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 149

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Table 12.9 Specifications in A/D Trigger Mode
6
0
12.2.4 A/D Trigger Mode
1
Count Source
Count Operation
Divide Ratio
Count Start Condition
Count Stop Condition
Interrupt Request
Generation Timing
TBiIN Pin Function
Read From Timer
Write To Timer
NOTES:
9
C
1 .
B
2 /
A/D trigger mode is used together with simultaneous sample sweep mode or delayed trigger mode 0 of
A/D conversion to start A/D conversion. It is used in timer B0 and timer B1 only. In this mode, the timer
starts counting by one trigger until the count value becomes 0000
register in A/D trigger mode and Figure 12.24 shows the TB2SC register.
0
1: A/D conversion is started by the timer underflow. For details refer to 15. A/D Converter.
2: When using in delayed trigger mode 0, set the larger value than the value of the timer B0 register
2
9
1
M
0
to the timer B1 register.
G
1
r a
0 -
o r
3 .
1
u
Item
, 0
1
p
2
2
0
0
7
(2)
page 123
f
• Decrement
• When the timer underflows, reload register contents are reloaded before
• When a trigger is generated during the count operation, the count is not
When the TBiS (i=0,1) bit in the TABSR register is 1(count started),
TBiEN(i=0,1) in TB2SC register is 1 (A/D trigger mode) and the following
trigger is generated.(Selection based on bits TB2SEL in the TB2SC)
• Timer B2 interrupt
• Underflow of Timer B2 interrupt generation frequency counter setting
• After the count value is 0000
• Set the TBiS bit to 0 (count stopped)
Timer underflows
I/O port
• When writing in the TBi register during count stopped.
• When writing in the TBi register during count.
Count value can be read by reading TBi register
1
stopping counting
1/(n+1)
affected
Value is written to both reload register and counter
Value is written to only reload register (Transfered to counter when reloaded next)
, f
f o
2
4
, f
5
8
8
, f
32
, and f
n: Setting value of TBi register (i=0,1)
0000
C32
(1)
16
-FFFF
16
Specification
16
and reload register contents are reloaded
16
. Figure 12.23 shows the TBiMR

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