M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 456
M30290FAHP#U5A
Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet
1.M30291FCHPU5A.pdf
(501 pages)
Specifications of M30290FAHP#U5A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
M30290FAHP#U5AM30290FAHP#D3
Manufacturer:
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Quantity:
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Part Number:
M30290FAHP#U5AM30290FAHP#U3A
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R
R
M
e
E
22.6 Timers
1
. v
J
6
0
22.6.1 Timer A
C
1
9
1 .
B
2 /
0
2
22.6.1.1 Timer A (Timer Mode)
22.6.1.2 Timer A (Event Counter Mode)
9
1
M
0
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to 1
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
2. While counting is in progress, the counter value can be read out at any time by reading the TAi
3. If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to 1
G
1
r a
o r
0 -
(i = 0 to 4) register and the TAi register before setting the TAiS bit in the TABSR register to 1 (count
starts).
Always make sure the TAiMR register is modified while the TAiS bit remains 0 (count stops) regard-
less whether after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always FFFF
counting, the read value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
(i = 0 to 4) register, the TAi register, the UDF register, bits TAZIE, TA0TGL, and TA0TGH in the
ONSF register and the TRGSR register before setting the TAiS bit in the TABSR register to 1 (count
starts).
Always make sure bits TAZIE, TA0TGL, and TA0TGH in the TAiMR register, the UDF register, the
ONSF register, and the TRGSR register are modified while the TAiS bit remains 0 (count stops)
regardless whether after reset or not.
register. However, if the TAi register is read at the same time the counter is reloaded, the read value
is always FFFF
If the TAi register is read after setting a value in it, but before the counter starts counting, the read
value is the one that has been set in the register.
(three-phase output forcible cutoff by input on SD pin enabled), the TA1
pins go to a high-impedance state.
3 .
1
u
, 0
1
p
2
2
0
0
7
page 430
16
16
. If the TAi register is read after setting a value in it, but before the counter starts
when the timer counter underflows and 0000
f o
4
5
8
_____
_____
_____
_____
16
when the timer counter overflows.
OUT
OUT
, TA2
, TA2
OUT
OUT
22. Usage Notes
and TA4
and TA4
OUT
OUT
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