M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 464

IC M16C/29 MCU FLASH 96K 80LQFP

M30290FAHP#U5A

Manufacturer Part Number
M30290FAHP#U5A
Description
IC M16C/29 MCU FLASH 96K 80LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/29r
Datasheet

Specifications of M30290FAHP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 27x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R
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e
E
1
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J
6
0
22.8.2 UART Mode
22.8.3 SI/O3, SI/O4
C
1
9
1 .
B
2 /
The SOUTi default value which is set to the SOUTi pin by the SMi7 bit approximately 10ns may be output
when changing the SMi3 bit from 0 (I/O port) to 1 (SOUTi output and CLKfunction) while the SMi2 bit in
the SiC (i=3 and 4) to 0 (SOUTi output) and the SMi6 bit is set to 1 (internal clock). And then the SOUTi
pin is held high-impedance.
If the level which is output from the SOUTi pin is a problem when changing the SMi3 bit from 0 to 1, set the
default value of the SOUTi pin by the SMi7 bit.
0
2
22.8.2.1 Special Mode 1 (I
22.8.2.2 Special Mode 2
22.8.2.3 Special Mode 4 (SIM Mode)
9
1
M
When generating start, stop and restart conditions, set the STSPSEL bit in the U2SMR4 register to 0
and wait for more than half cycle of the transfer clock before setting each condition generate bit
(STAREQ, RSTAREQ and STPREQ) from 0 to 1.
If a low-level signal is applied to the SD pin when the IVPCR1 bit in the TB2SC register is set to 1
(three-phase output forcible cutoff by input on SD pin enabled), the RTS
impedance state.
A transmit interrupt request is generated by setting the U2C1 register U2IRS bit to 1 (transmission
complete) and U2ERE bit to 1 (error signal output) after reset. Therefore, when using SIM mode, be
sure to clear the IR bit to 0 (no interrupt request) after setting these bits.
0
G
1
r a
o r
0 -
3 .
1
u
, 0
1
p
2
2
0
0
7
page 438
f o
2
C bus Mode)
4
5
8
_____
_____
2
and CLK
2
pins go to a high-
22. Usage Notes

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