MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 435

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
24.4.1 ADC Port I/O Pins
MC68HC08AZ60A — Rev 0.0
MOTOROLA
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRB
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
CONVERSION
COMPLETE
CGMXCLK
PTD6/ATD14/TACLK
general-purpose I/O pins that share with the ADC channels.
The channel select bits define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
RESET
Figure 24-1. ADC Block Diagram
Analog-to-Digital Converter (ADC-15)
ADIV[2:0]
ADC DATA REGISTER
CLOCK
GENERATOR
DDRBx/DDRDx
ADC
PTBx/PTDx
ADC CLOCK
ADICLK
PTD0/ATD8 and PTB7/ATD7
ADC VOLTAGE IN
ADCVIN
Analog-to-Digital Converter (ADC-15)
DISABLE
DISABLE
CHANNEL
SELECT
ADC CHANNEL x
PTBx/PTDx
Functional Description
PTB0/ATD0 are
ADCH[4:0]
Advance Information
435

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