MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 164
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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Clock Generator Module (CGM)
Advance Information
164
The K factor in the equations is derived from internal PLL parameters.
K
K
Acquisition and Tracking Modes
Note the inverse proportionality between the lock time and the reference
frequency.
In automatic bandwidth control mode, the acquisition and lock times are
quantized into units based on the reference frequency. (See
and Automatic PLL Bandwidth Modes
number of clock cycles, n
within the tracking mode entry tolerance,
mode. A certain number of clock cycles, n
that the PLL is within the lock mode entry tolerance,
acquisition time, t
acquisition to lock time, t
since the average frequency over the entire measurement period must
be within the specified tolerance, the total time usually is longer than
t
Lock
acq
trk
•
•
•
•
is the K factor when the PLL is configured in tracking mode. (See
is the K factor when the PLL is configured in acquisition mode, and
as calculated above.
Correct selection of filter capacitor, C
Capacitor
Room temperature operation
Negligible external leakage on CGMXFC
Negligible noise
Clock Generator Module (CGM)
on page 163).
ACQ
, is an integer multiple of n
t
al
t
acq
AL
=
ACQ
t
, is an integer multiple of n
Lock
=
------------------- -
f
, is required to ascertain that the PLL is
CGMRDV
V
=
------------------- -
f
DDA
CGMRDV
V
t
on page 145).
ACQ
DDA
+
----------- -
K
on page 145). A certain
TRK
TRK
t
TRK
4
F
AL
------------ -
K
(see
, before exiting acquisition
, is required to ascertain
ACQ
8
MC68HC08AZ60A — Rev 0.0
ACQ
Choosing a Filter
/f
TRK
Lock
CGMRDV
/f
. Therefore, the
CGMRDV
MOTOROLA
Manual
, and the
. Also,
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