MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 174

no-image

MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Break Module
11.4.2 CPU During Break Interrupts
11.4.3 TIM and PIT During Break Interrupts
11.4.4 COP During Break Interrupts
11.5 Break Module Registers
Advance Information
174
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt when V
RST pin.
Three registers control and monitor operation of the break module:
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD ($FEFC:$FEFD
in monitor mode)
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
Break Module
MC68HC08AZ60A — Rev 0.0
HI
is present on the
MOTOROLA

Related parts for MC68HC08AZ60ACFU