MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 421
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
NOTE:
TSTOP — TIMA Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIMA is
required to exit wait mode. Also, when the TSTOP bit is set and input
capture mode is enabled, input captures are inhibited until TSTOP is
cleared.
TRST — TIMA Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIMA
counter at a value of $0000.
PS[2:0] — Prescaler Select Bits
This read/write bit stops the TIMA counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIMA
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIMA counter and the TIMA
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIMA counter is reset and always reads as logic 0. Reset clears
the TRST bit.
These read/write bits select either the PTD6/ATD14/TACLK pin or
one of the seven prescaler outputs as the input to the TIMA counter
as
1 = TIMA counter stopped
0 = TIMA counter active
1 = Prescaler and TIMA counter cleared
0 = No effect
Table 23-1
Timer Interface Module A (TIMA)
PS[2:0]
000
001
010
100
101
011
110
111
shows. Reset clears the PS[2:0] bits.
Table 23-1. Prescaler Selection
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock 1
PTD6/ATD14/TACLK
TIMA Clock Source
Timer Interface Module A (TIMA)
16
32
64
2
4
8
Advance Information
I/O Registers
421
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