MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 321
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
(480 pages)
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20.4.2 Data Direction Register B (DDRB)
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
DDRB
$0005
Reset:
Read:
Write:
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic one to a DDRB bit enables the output buffer
for the corresponding port B pin; a logic zero disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 20-6
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
DDRB7
Figure 20-5. Data Direction Register B (DDRB)
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Bit 7
0
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
shows the port B I/O logic.
DDRB6
6
0
Figure 20-6. Port B I/O Circuit
I/O Ports
RESET
DDRB5
5
0
DDRB4
4
0
DDRBx
PTBx
DDRB3
3
0
DDRB2
2
0
Advance Information
DDRB1
1
0
I/O Ports
DDRB0
Bit 0
Port B
0
PTBx
321
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