MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 130

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
System Integration Module (SIM)
8.6.1.2 SWI Instruction
8.6.2 Reset
8.7 Break Interrupts
8.7.1 Status Flag Protection in Break Mode
Advance Information
130
NOTE:
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
The SWI instruction is a non-maskable instruction that causes an
interrupt regardless of the state of the interrupt mask (I-bit) in the
condition code register.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
All reset sources always have equal and highest priority and cannot be
arbitrated.
The break module can stop normal program flow at a software-
programmable break point by asserting its break interrupt output. See
Break Module. The SIM puts the CPU into the break state by forcing it
to the SWI vector location. Refer to the break interrupt subsection of
each module to see how each module is affected by the break state.
The SIM controls whether status flags contained in other modules can
be cleared during break mode. The user can select whether flags are
protected from being cleared by properly initializing the break clear flag
enable bit (BCFE) in the SIM break flag control register (SBFCR).
Protecting flags in break mode ensures that set flags will not be cleared
while in break mode. This protection allows registers to be freely read
and written during break mode without losing status flag information.
Setting the BCFE bit enables the clearing mechanisms. Once cleared in
break mode, a flag remains cleared even when break mode is exited.
System Integration Module (SIM)
MC68HC08AZ60A — Rev 0.0
MOTOROLA

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