MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 123

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.4.2 Active Resets From Internal Sources
MC68HC08AZ60A — Rev 0.0
MOTOROLA
CGMXCLK
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow for resetting of external peripherals. The internal reset
signal IRST continues to be asserted for an additional 32 cycles. See
Figure
opcode, COP timeout, LVI, or POR. See
POR resets, the SIM cycles through 4096 CGMXCLK cycles, during
which the SIM forces the RST pin low. The internal reset signal then
follows the sequence from the falling edge of RST as shown in
8-4.
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
IRST
RST
IAB
8-4. An internal reset can be caused by an illegal address, illegal
System Integration Module (SIM)
RST PULLED LOW BY MCU
Figure 8-5. Sources of Internal Reset
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 8-4. Internal Reset Timing
32 CYCLES
COPRST
POR
LVI
Figure
32 CYCLES
System Integration Module (SIM)
INTERNAL RESET
Reset and System Initialization
8-5. Note that for LVI or
Advance Information
VECTOR HIGH
Figure
123