MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 385

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
21.14.6 MSCAN08 Receiver Interrupt Enable Register
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
NOTE:
Address:
OVRIF — Overrun Interrupt Flag
RXF — Receive Buffer Full
To ensure data integrity, no registers of the receive buffer shall be read
while the RXF flag is cleared.
The CRFLG register is held in the reset state when the SFTRES bit in
CMCR0 is set.
WUPIE — Wakeup Interrupt Enable
Reset:
Read:
Write:
This flag is set when a data overrun condition occurs. If not masked,
an error interrupt is pending while this flag is set.
The RXF flag is set by the MSCAN08 when a new message is
available in the foreground receive buffer. This flag indicates whether
the buffer is loaded with a correctly received message. After the CPU
has read that message from the receive buffer the RXF flag must be
cleared to release the buffer. A set RXF flag prohibits the exchange
of the background receive buffer into the foreground buffer. If not
masked, a receive interrupt is pending while this flag is set.
Figure 21-20. Receiver Interrupt Enable Register (CRIER)
1 = A data overrun has been detected since last clearing the flag.
0 = No data overrun has occurred.
1 = The receive buffer is full. A new message is available.
0 = The receive buffer is released (not full).
1 = A wakeup event will result in a wakeup interrupt.
0 = No interrupt will be generated from this event.
WUPIE
$0505
Bit 7
MSCAN08 Controller (MSCAN08)
0
RWRNIE TWRNIE
6
0
5
0
RERRIE
4
0
Programmer’s Model of Control Registers
TERRIE
3
0
MSCAN08 Controller (MSCAN08)
BOFFIE
2
0
Advance Information
OVRIE
1
0
RXFIE
Bit 0
0
385

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