MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 389

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

21.14.9 MSCAN08 Identifier Acceptance Control Register
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
NOTE:
Address:
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
IDAM1–IDAM0— Identifier Acceptance Mode
Reset:
Read:
Write:
Figure 21-23. Identifier Acceptance Control Register (CIDAC)
387) will be set and an TXE interrupt is generated if enabled. The
CPU cannot reset ABTRQx. ABTRQx is cleared implicitly whenever
the associated TXE flag is set.
The CPU sets these flags to define the identifier acceptance filter
organization (see
21-9
messages will be accepted so that the foreground buffer will never be
reloaded.
1 = Abort request pending
0 = No abort request
1 = A transmitter empty (transmit buffer available for transmission)
0 = No interrupt is generated from this event.
summarizes the different settings. In “filter closed” mode no
$0508
Bit 7
event results in a transmitter empty interrupt.
MSCAN08 Controller (MSCAN08)
0
0
= Unimplemented
6
0
0
Identifier Acceptance Filter
IDAM1
5
0
IDAM0
4
0
Programmer’s Model of Control Registers
3
0
0
MSCAN08 Controller (MSCAN08)
on page 352).
2
0
0
Advance Information
IDHIT1
1
0
Table
IDHIT0
Bit 0
0
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