MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 181

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

12.4.2 Data Format
MC68HC08AZ60A — Rev 0.0
MOTOROLA
BREAK
$A5
START
BIT
1. If the high voltage (V
Monitor
START
START
Modes
User
BIT
BIT
serts its COP enable output. The COP is enabled or disabled by the COPD bit in the configuration reg-
ister. See 5.0 Volt DC Electrical Characteristics.
BIT 0
BIT 0
BIT 0
Table 12-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
The data transmit and receive rate can be anywhere up to 28.8 KBaud.
Transmit and receive baud rates must be identical.
Disabled
Figure 12-3. Sample Monitor Waveforms
BIT 1
Enabled
COP
BIT 1
BIT 1
Figure 12-2. Monitor Data Format
HI
BIT 2
(1)
) is removed from the IRQ and/or RESET pin while in monitor mode, the SIM as-
BIT 2
BIT 2
is a summary of the differences between user mode and
Table 12-2. Mode Differences
Monitor ROM (MON)
Vector
$FEFE
$FFFE
BIT 3
Reset
High
BIT 3
BIT 3
BIT 4
BIT 4
BIT 4
Vector
$FFFF
$FEFF
Reset
Low
BIT 5
BIT 5
BIT 5
Functions
BIT 6
Vector
$FFFC
$FEFC
Break
BIT 6
BIT 6
High
Figure 12-2
BIT 7
BIT 7
BIT 7
Vector
$FFFD
$FEFD
Break
Low
STOP
BIT
STOP
STOP
BIT
BIT
and
START
NEXT
BIT
Functional description
START
START
NEXT
NEXT
Vector
$FFFC
$FEFC
Monitor ROM (MON)
Advance Information
BIT
BIT
Figure
High
SWI
12-3).
Vector
$FFFD
$FEFD
Low
SWI
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