MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 273
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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17.12.5 V
(Clock Ground)
17.13 I/O Registers
MC68HC08AZ60A — Rev 0.0
MOTOROLA
SS
X = don’t care
SPE
0
1
1
1
regardless of the state of the data direction register of the shared I/O
port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the data register. See
4.
V
for the port output buffers. To reduce the ground return path loop and
minimize radio frequency (RF) emissions, connect the ground pin of the
slave to the V
Three registers control and monitor SPI operation:
SS
•
•
•
is the ground return for the serial clock pin, SPSCK, and the ground
SPMSTR MODFEN SPI CONFIGURATION
SPI control register (SPCR)
SPI status and control register (SPSCR)
SPI data register (SPDR)
X
0
1
1
Serial Peripheral Interface (SPI)
SS
pin.
X
X
Table 17-4. SPI Configuration
0
1
Master without MODF
Master with MODF
Not Enabled
Slave
Serial Peripheral Interface (SPI)
General-purpose I/O; SS
General-purpose I/O; SS
STATE OF SS LOGIC
Input-only to SPI
Input-only to SPI
ignored by SPI
ignored by SPI
Advance Information
I/O Registers
Table 17-
273
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