MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 122
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
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System Integration Module (SIM)
8.4.1 External Pin Reset
Advance Information
122
CGMOUT
RST
IAB
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter, see SIM Counter on page 126,
but an external reset does not. Each of the resets sets a corresponding
bit in the SIM reset status register (SRSR). See SIM Registers.
Pulling the asynchronous RST pin low halts all processing. The PIN bit
of the SIM reset status register (SRSR) is set as long as RST is held low
for a minimum of 67 CGMXCLK cycles, assuming that neither the POR
nor the LVI was the source of the reset. See
8-3
PC
•
•
shows the relative timing.
Reset type
Illegal opcode
Illegal address
All others
POR/LVI
System Integration Module (SIM)
Figure 8-3. External Reset Timing
Table 8-3. PIN Bit Set Timing
Number of cycles required to set PIN
4163 (4096 + 64 + 3)
VECT H
67 (64 + 3)
Table 8-3
MC68HC08AZ60A — Rev 0.0
VECT L
for details.
MOTOROLA
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