MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 103

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

7.4.5 Condition Code Register (CCR)
MC68HC08AZ60A — Rev 0.0
MOTOROLA
CCR
PC
Reset:
Read:
Write:
Reset:
Read:
Write:
During reset, the program counter is loaded with the reset vector
address located at $FFFE and $FFFF. The vector address is the
address of the first instruction to be executed after exiting the reset state.
The 8-bit condition code register contains the interrupt mask and five
flags that indicate the results of the instruction just executed. Bits 6 and
5 are set permanently to ‘1’. The following paragraphs describe the
functions of the condition code register.
V — Overflow Flag
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
X = Indeterminate
Bit
15
1 = Overflow
0 = No overflow
Bit 7
X
V
Figure 7-6. Condition Code Register (CCR)
14
Central Processor Unit (CPU)
Figure 7-5. Program Counter (PC)
13
6
1
1
12
Loaded with vector from $FFFE and $FFFF
11
5
1
1
10
9
H
X
4
8
7
3
1
I
6
Central Processor Unit (CPU)
5
N
X
2
4
Advance Information
3
X
1
Z
CPU registers
2
1
Bit 0
C
X
Bit
103
0