MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 170

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Mask Options
Advance Information
170
MORB
$FE09
Reset:
Read:
Write:
EEDIVCLK — EEPROM-1 and EEPROM-2 Timebase Dividers Clock
Select Bit
EEMONSEC — EEPROM Read Protection in Monitor Mode Bit
AZ60A — Device Indicator (Not user-selectable)
Extra care should be exercised when selecting mask option
registers since other HC08 family parts may have different options.
If in doubt, check with your local field applications representative.
EEDIVCLK
EEDIVCLK selects the reference clock source for the EEPROM-1 and
EEPROM-2 timebase dividers. See
Register
on page 94.
When EEMONSEC is set, the entire EEPROM-1 and EEPROM-2
arrays cannot be acessed in monitor mode unless a valid security
code is entered.
This bit is set to a logic ’1’.
Bit 7
Figure 10-2. Mask Option Register B (MORB)
1 = CPU bus clock drives the EEPROM-1 and EEPROM-2
0 = CGMXCLK drives the EEPROM-1 and EEPROM-2 timebase
1 = EEPROM-1 and EEPROM-2 read protection in monitor mode
0 = EEPROM-1 and EEPROM-2 read protection in monitor mode
R
timebase dividers
dividers
enabled.
disabled.
= Unimplemented
on page 74 and
R
6
Mask Options
5
R
EEMONSEC
EEPROM-2 Timebase Divider Register
Unaffected by reset
R
R
4
= Reserved
EEPROM-1 Timebase Divider
AZ60A
R
3
MC68HC08AZ60A — Rev 0.0
2
1
MOTOROLA
Bit 0