h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 656

no-image

h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 15 I
Rev. 6.00 Feb 22, 2005 page 596 of 1484
REJ09B0103-0600
Notes on I
If the rise time of the 9th SCL acknowledge exceeds the specification because the bus load
capacitance is large, or if there is a slave device of the type that drives SCL low to effect a
wait, issue the stop condition instruction after reading SCL and determining it to be low, as
shown below.
Notes on IRIC Flag Clearance when Using Wait Function
If the SCL rise time exceeds the designated duration or if the slave device is of the type that
keeps SCL low and applies a wait state when the wait function is used in the master mode of
the I
low, as shown below.
Clearing the IRIC flag to 0 when WAIT is set to 1 and SCL is being held at high level can
cause the SDA value to change before SCL goes low, resulting in a start condition or stop
condition being generated erroneously.
SDA
IRIC
SCL
2
C bus interface, read SCL and clear the IRIC flag after determining that SCL has gone
2
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
2
C Bus Interface Stop Condition Instruction Issuance
SCL
SDA
IRIC
Figure 15-24 IRIC Flag Clearance in WAIT = 1 Status
VIH
Figure 15-23 Timing of Stop Condition Issuance
9th clock
As waveform rise is late,
[1] Determination of SCL = low
SCL is detected as low
V
SCL = low detected
High period secured
[1] Judgement that SCL = low [2] IRIC clearance
IH
SCL = high duration
maintained
[2] Stop condition instruction issuance
Stop condition

Related parts for h8s-2635