h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 124

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
2.8.2
When the
state all interrupts are disenabled.
Reset exception handling starts when the
The reset state can also be entered by a watchdog timer overflow. For details, refer to section 12,
Watchdog Timer.
Rev. 6.00 Feb 22, 2005 page 64 of 1484
REJ09B0103-0600
Notes: 1.
2.
3.
Reset State
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low. A transition can also be made to the reset state when the
watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
Apart from these states, there are also the watch mode, subactive mode, and the subsleep mode.
See section 23A, 23B, Power-Down Modes.
R E S
Exception handling state
goes low, all current processing stops and the CPU enters the reset state. In reset
Bus-released state
Reset state *
Reset state
RES = High
1
Figure 2-15 State Transitions
External interrupt request
R E S
Program execution state
End of bus request
signal changes from low to high.
Bus request
STBY = High, RES = Low
Hardware standby mode *
Software standby mode
Power-down state *
Sleep mode
3
2