h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 639

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
The reception procedure and operations in slave receive mode are described below.
(1) Set the ICE bit in ICCR to 1. Set the MLS bit in ICMR and the MST and TRS bits in ICCR
(2) When the start condition output by the master device is detected, the BBSY flag in ICCR is set
(3) When the slave address matches in the first frame following the start condition, the device
(4) At the 9th clock pulse of the receive frame, the slave device drives SDA low and returns an
(5) Read ICDR and clear the IRIC flag in ICCR to 0. The RDRF flag is cleared to 0.
Receive operations can be performed continuously by repeating steps (4) and (5). When SDA is
changed from low to high when SCL is high, and the stop condition is detected, the BBSY flag in
ICCR is cleared to 0.
according to the operating mode.
to 1.
operates as the slave device specified by the master device. If the 8th data bit (R/
TRS bit in ICCR remains cleared to 0, and slave receive operation is performed.
acknowledge signal. At the same time, the IRIC flag in ICCR is set to 1. If the IEIC bit in
ICCR has been set to 1, an interrupt request is sent to the CPU. If the RDRF internal flag has
been cleared to 0, it is set to 1, and the receive operation continues. If the RDRF internal flag
has been set to 1, the slave device drives SCL low from the fall of the receive clock until data
is read into ICDR.
Section 15 I
2
C Bus Interface [Option] (Only for the H8S/2638, H8S/2639, and H8S/2630)
Rev. 6.00 Feb 22, 2005 page 579 of 1484
REJ09B0103-0600
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) is 0, the

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