h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 169

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
5.2.2
The IPR registers are twelve 8-bit readable/writable registers that set priorities (levels 7 to 0) for
interrupts other than NMI.
The correspondence between IPR settings and interrupt sources is shown in table 5-3.
The IPR registers set a priority (level 7 to 0) for each interrupt source other than NMI.
The IPR registers are initialized to H'77 by a reset and in hardware standby mode.
Bits 7 and 3—Reserved: These bits are always read as 0 and cannot be modified.
Table 5-3
Notes: 1. Reserved. These bits are always read as 1 and cannot be modified.
Register
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
IPRJ
IPRK
IPRL
IPRM
2. I
3. The PC break, DTC, and HCAN channel 1 are reserved in the H8S/2635 Group.
Interrupt Priority Registers A to H, J to M (IPRA to IPRH, IPRJ to IPRM)
The IIC bit becomes reserved bit when this optional feature is not used.
2
C bus interface is available as an option in the H8S/2638, H8S/2639, and H8S/2630.
Correspondence between Interrupt Sources and IPR Settings
¾
¾
6 to 4
IRQ0
IRQ2
IRQ3
— *
Watchdog timer 0
PC break *
TPU channel 0
TPU channel 2
TPU channel 4
— *
SCI channel 1
— *
PWM channel 1, 2
HCAN channel 1 *
1
1
1
3
3
Rev. 6.00 Feb 22, 2005 page 109 of 1484
¾
¾
Bits
2 to 0
IRQ1
IRQ4
IRQ5
DTC *
— *
A/D converter, watchdog timer 1
TPU channel 1
TPU channel 3
TPU channel 5
SCI channel 0
SCI channel 2
IIC (Option) *
HCAN channel 0
1
Section 5 Interrupt Controller
3
2
REJ09B0103-0600

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