h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 345

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
9.11.2
Table 9-19 shows the port F register configuration.
Table 9-19 Port F Registers
Notes: 1. Lower 16 bits of the address.
Port F Data Direction Register (PFDDR)
PFDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port F. PFDDR cannot be read; if it is, an undefined value will be read.
PFDDR is initialized by a reset, and in hardware standby mode, to B'10000**0 in modes 4 to 6,
and to B'00000**0 in mode 7. It retains its prior state in software standby mode. The OPE bit in
SBYCR is used to select whether the bus control output pins retain their output state or become
high-impedance when a transition is made to software standby mode.
Name
Port F data direction register
Port F data register
Port F register
Modes 4 to 6
Mode 7
Bit
Initial value :
R/W
Initial value :
R/W
Modes 4 to 6
Pin PF7 functions as the output pin when the corresponding PFDDR bit is set to 1, and as an
input port when the bit is cleared to 0.
The input/output direction specified by PFDDR is ignored for pins PF6 to PF3, which are
automatically designated as bus control outputs (
pin PF3 is designated by PFDDR).
2. Initial value depends on the mode.
Register Configuration
:
:
:
PF7DDR PF6DDR PF5DDR PF4DDR PF3DDR
W
W
7
1
0
W
W
6
0
0
Abbreviation R/W
PFDDR
PFDR
PORTF
W
W
5
0
0
W
R/W
R
W
W
4
0
0
A S
,
Rev. 6.00 Feb 22, 2005 page 285 of 1484
R D
Initial Value
B'10000**0 *
B'00000**0 *
B'00000**0
Undefined
,
H W R
W
W
3
0
0
, and
undefined undefined
undefined undefined
2
2
/
2
L W R
) (in the 8-bit mode,
Section 9 I/O Ports
REJ09B0103-0600
Address *
H'FE3E
H'FF0E
H'FFBE
1
PF0DDR
1
W
W
0
0
0

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